CPU Features

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FPU: Floating Processing Unit VME: Virtual Mode Extension DE: Debugging Extensions PSE: Page Size Extension is a feature x86 processors that extends the physical memory addressing capabilities. TSC - Time Stamp Counter MSR - Model Specific Register PAE - Physical Address Extension MCE - Machine Check Exception CX8 - 64 bit compare and swap APIC - Advanced Programmable Interrupt Controller SEP - SYSENTER SYSEXIT MTRR - Memory Type Range Registers PGE - Page Global Enable MCA - Machine Check Architecture CMOV - CMOV conditional move PAT - Page Attribute Table PSE36 - PSE extension from 32 bit to 36 bit CLFSH - Cache line flush DS - Debug store ACPI - Advanced Configuration and Power Interface MMX - MMX SIMD Instructions FXSR - FXSAVE / FXRSTOR SSE - Streaming SIMD Extensions SSE2 - Streaming SIMD Extensions 2 SS CPU self snoop HTT - Hyper threading TM - Automatic clock control (Thermal Monitor) PBE - Pending break enable SSE3 - Streaming SIMD Extensions 3 PCLMULQDQ - Perform Carry Less Multiplication Quadword DTES64 - 64 bit debug store MON - Monitor DSCPL - CPL Qual. Debug store VMX - Intel Hardware Virtualization EST - Speedstep TM2 - Thermal Monitor SSSE3 - Suplimental Streaming SIMD Extensions 3 FMA - Fused Multiply Add a*b + c CX16 - Double compare and swap TPR - Task Priority Messages PDCM - Performance Capabilities SSE4.1 - Streaming SIMD Extensions 4.1 SSE4.2 - Streaming SIMD Extensions 4.2 x2APIC - APIC MOVBE - Move after Swapping bytes, used for endian conversion POPCNT - Hamming weight AES - AES instruction set PCID - Process Context Identification XSAVE - Save Processor Extended States OSXSAVE - OSX Save SEGLIM64 TSCTMR AVX1.0 - Advanced Vector Extensions RDRAND - Read random number F16C - 16 bit fp conversion

RDWRFSGS TSC_THREAD_OFFSET SGX BMI1 - 1st group bit manipulation extensions AVX2 - Advanced Vector Extensions 2 SMEP - Supervisor Mode Execution Protection BMI2 - 2nd group bit manipulation extensions ERMS - Enhanced REP MOVSB/STOSB INVPCID - Invalidate Processor Context ID FPU_CSDS - MPX - Memory Protection Extension RDSEED - RDSEED instruction ADX - The ADCX and ADOX instructions SMAP - Supervisor Mode Access Prevention CLFSOPT - CLFLUSHOPT instruction IPT SGXLC MDCLEAR TSXFA IBRS - Indirect Branch Restricted Speculation STIBP L1DF SSBD SYSCALL - SYSCALL instruction XD 1GBPAGE - 1GB Page EM64T LAHF - Load AH from Flags (LAHF) and Store AH into Flags (SAHF) in long mode LZCNT PREFETCHW RDTSCP - Read Time Stamp Counter and Processor ID TSCI avx512f: AVX-512 foundation avx512dq: AVX-512 Double/Quad instructions avx512pf: AVX-512 Prefetch avx512er: AVX-512 Exponential and Reciprocal avx512cd: AVX-512 Conflict Detection sha_ni: SHA1/SHA256 Instruction Extensions avx512bw: AVX-512 Byte/Word instructions avx512vl: AVX-512 128/256 Vector Length extensions

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